Method and material for removing etch residue from high aspect ratio contact surfaces

ABSTRACT

Contact openings in semiconductor substrates are formed through insulative layers using an etchant material. The etchant typically leaves behind a layer of etch residue which interferes with the subsequent deposition of conductive material in the opening, as well as the conductive performance of the resulting contact. A method of etch removal from semiconductor contact openings utilizes ammonia to clean the surfaces thereof of any etch residue.

FIELD OF THE INVENTION

[0001] The present invention relates to a novel method and material forremoving etch residue from high aspect ratio contacts, and morespecifically, to a process and material for cleaning contact openingsurfaces without substantially increasing the size or depth of thecontact opening and without producing a silicon rich oxide at the bottomof the contact opening.

BACKGROUND OF THE INVENTION

[0002] One goal in forming many high aspect ratio (HAR) contacts inintegrated circuits is the deposition of a very thin layer of titaniumat the bottom of an etched opening, such as a via or trench. This layerfacilitates electrical contact between the contact material which willsubsequently fill the opening and the material to which it connects,e.g. doped polysilicon. Prior to this deposition, an etching solution isutilized to form the openings necessary in an insulative layer, forexample, Boro-Phospho-Silicate Glass (BPSG) or other insulator layer toprovide the HAR contact access to an exposed underlying conductivematerial. This conductive material is usually formed of dopedpolysilicon, or some other conductive substance. The thin titanium layerreacts with this polysilicon, usually in the presence of heat, to form atitanium silicide layer.

[0003] Unfortunately, the materials used for etching the BPSG layertypically leave a polymer residue which ends up coating the inside andespecially the bottom of the HAR contact opening. This residue must beremoved before a titanium deposition can be initiated. The traditionalway of removing this residue has been through the utilization of anoxygen (O₂) plasma strip step. The etch polymer residue reacts with theoxygen and is removed.

[0004] This process however, can leave behind a silicon rich oxideresidue layer at the bottom of the opening because the oxygen alsoreacts with the polysilicon. The silicon rich layer can be representedas SiOx, with x being between 0 and 2. This layer can also containimpurities, for example, carbon and fluorine impurities. This siliconrich oxide layer residue is substantially non-conductive, and thereforeinterferes with the deposition and of a conductive titanium material inthe etched opening and the subsequent formation of a desirable titaniumsilicide layer at the bottom of the contact opening. This in turnaffects the conductive performance of a conductor formed in the opening.

[0005] Traditional “wet chemistries” have been employed to remove thesilicon rich oxide layer formed as a result of O₂ plasma stripping tofurther assist in preparing the HAR bottom surface opening for Tideposition. However, these methodologies have not been entirelysuccessful in removing the silicon rich oxide layer. These chemicalmethods are not generally selective to the silicon rich oxide layer, andthus they can undesirably also etch the BPSG sidewalls of the openingand thereby increase its size.

[0006] What is therefore needed is an improved process for removingpolymer etch residue from HAR contact openings which eliminates theformation of a silicon rich oxide layer within the contact opening. Theprocess should also effectively eliminate the etch polymer from both thesides and bottom of the HAR opening without undesirably increasing itssize.

SUMMARY OF THE INVENTION

[0007] The invention provides a method for removing etch residue fromHigh Aspect Ratio openings, e.g. vias and trenches, in silicon waferdevices which involves contacting their surfaces with ammonia during atleast a latter part of polymer residue removal. The method removes thepolymer etch residue, without producing a silicon rich oxide layerwithin the contact opening and without substantially increasing the sizeof the contact opening. The invention permits the reliable deposition ofa thin conductive layer, e.g. of titanium at the bottom of the contactopening, which can be used to form a silicide to improve the conductiveperformance of a conductor formed in the contact opening.

[0008] The invention also provides an integrated circuit having anammonia-cleaned, polymer residue-free and silicon rich oxide-free highaspect ratio opening in an insulating layer.

[0009] The invention also provides a method of forming a contact openingin a semiconductor device which involves first etching a contact openingin an insulative layer in the device down to a polysilicon plug and thencleaning etch residue from the opening using ammonia gas.

[0010] Additional advantages and features of the present invention willbecome more readily apparent from the following detailed description anddrawings which illustrate various embodiments of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

[0011]FIG. 1 is a cross sectional view of a portion of an integratedcircuit wafer in a intermediate stage of fabrication of a memory device.

[0012]FIG. 2 is the wafer of FIG. 1 having an insulative layer depositedthereon.

[0013]FIG. 3 is the wafer of FIG. 2 in which contact openings have beenformed in the insulative layer.

[0014]FIG. 4 is the wafer of FIG. 3 showing etch residue in the contactopenings.

[0015]FIG. 5 is the wafer of FIG. 4 in which a silicon rich oxide layeris formed in the contact openings.

[0016]FIG. 6 is the wafer of FIG. 5 illustrating the process of theinvention according to one embodiment.

[0017]FIG. 7 is the wafer of FIG. 6 in which the contact opening hasbeen cleaned of etch residue.

[0018]FIG. 8 is the wafer of FIG. 7 in which a tungsten plug has beenformed in the contact opening.

[0019]FIG. 9A is a microphotograph representing exposed side views of afirst and second actual bottom contact surface which have been cleanedand layered in accordance with an embodiment of the invention.

[0020]FIG. 9B is a microphotograph representing exposed side views of athird and fourth bottom contact surface as a comparative example.

[0021]FIG. 9C is a microphotograph representing exposed side views of afifth and sixth bottom contact surface as a second comparative example.

[0022]FIG. 10A is a microphotograph representing an exposed side view ofanother contact opening bottom surface.

[0023]FIG. 10B is a microphotograph representing an exposed side view ofyet another bottom surface as a comparative example to FIG. 10A.

[0024]FIG. 10C is a microphotograph representing an exposed side view ofstill another bottom surface as a second comparative example to FIG.10A.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0025] The invention is directed to the removal of etch residue fromcontact openings or vias formed in semiconductor wafers. While all suchcontact openings or vias are contemplated herein, particular referencewill be made to high aspect ratio (HAR) contact openings. As that termis used herein, “high aspect ratio” refers to aspect ratios from about0.5:1 to about 20.0:1. Furthermore, reference shall also be made to theterms “wafer” and “substrate”, which are to be understood as includingsilicon, silicon-on-insulator (SOI) or silicon-on-sapphire (SOS)substrates, doped and undoped semiconductors, epitaxial layers ofsilicon supported by a base semiconductor foundation, and othersemiconductor structures. In addition, when reference is made to a“wafer” or “substrate” in the following description, previous processsteps may have been utilized to form regions, junctions or layers in orover the base semiconductor structure or foundation. In addition, thesemiconductor need not be silicon-based, but could be based onsilicon-germanium, germanium or gallium arsenide.

[0026] Referring now to the drawings in which like numerals indicatelike components throughout the various embodiments, FIG. 1 illustrates aportion of an integrated circuit wafer 10 at an intermediate stage offabrication of a memory device. The integrated circuit wafer section 10has a substrate 12. The substrate is formed of a material such assilicon. Field oxide regions 13, transistor gate stacks 15, dopedregions 17 and capacitors 19 (illustrated as a single layer 19 but whichactually contains a plurality of material layers as well know) areformed over the substrate. The substrate 12 also has conductive areas inthe form of polysilicon “plugs” 14 formed thereon which have beendeposited through a first layer of insulating material 16, which isusually a type of glass oxide well known in the art, for example, BPSG.The first layer of insulating material 16 may, in actuality, be formedas one or more layers of insulating material of, for example, BPSG.

[0027] Referring now to FIGS. 2 and 3, in the formation of HAR contactopenings, a second layer of insulating material 18 is first depositedover the first layer 16. As shown in FIG. 3, contact openings 20 arethen formed through this second insulative layer 18 so as to contact thepolysilicon conductive plugs 14. Openings 20 are formed through apatterned photoresist mask 21 which defines locations or areas to beetched, i.e. the openings. To form the HAR contact opening, an etchantis applied to the insulating layer 18. Dry etching techniques known inthe art are utilized for this purpose. Fluorine-containing gases, forexample, are applied to the surface of the insulating layer 18 to formthe opening 20. A non-exhaustive listing of such gases includes CH₂F₂,CHF₃, C₂F₆, C₂HF₅, and CH₃F, which may be used alone or in combination.After etching, the photoresist layer 21 is removed.

[0028] As shown in FIG. 4, the etched opening 20 extends to theunderlying plug 14. Unfortunately, after etching a polymer etch residue22 is left in the opening 20, both on the sidewalls and the bottom ofopening 20. This etch residue must be removed to enable a subsequentconductor placed in the opening to obtain good electrical contact withplug 14. Moreover, the deeper the opening 20, the more difficult itbecomes to remove the etch residue 22 from the bottom thereof. Presentattempts to remove this residue 22 typically involved an O₂ plasma etch,for example.

[0029] As shown in FIG. 5, the O₂ plasma etch method has not provenentirely satisfactory, however. The oxygen plasma can remove the polymerresidue 22, but in turn will form an undesirable layer 24 of a siliconrich oxide which can vary in depth over the bottom of the opening 20.

[0030] It is especially undesirable to have this oxidized layer 24 atthe bottom of the HAR opening. This layer is relatively non-conductiveand can interfere with both the deposition and the conductivity of asubsequently-deposited thin conductive layer such as for example,titanium, which is used to form a silicide layer between a conductormaterial deposited in the opening and the underlying contact area, e.g.polysilicon. Since the underlying conductive area is typically formed ofpolysilicon, deposition of titanium coupled with a heat treatment yieldsa titanium silicide layer. The presence, however, of silicon richresidue can inhibit the formation of a desired layer of titaniumsilicide and leave an oxide rich material on the bottom of the contactopening which can interfere with subsequent processing steps during thecontact fill process. The overall effect can significantly reduceconductivity, and affect device performance and yield.

[0031] The invention uses ammonia to remove the polymer etch residue.The use of ammonia to strip the polymer etch residue significantlyreduces or eliminates oxidation of the HAR contact opening, therebyleaving a substantially oxide free side and bottom of the opening forthe subsequent deposition of a conductive layer. Moreover, the use ofammonia does not substantially increase the size of the HAR opening,i.e. does not widen or deepen the opening as the reaction does not etchthe BPSG sidewalls of the opening. As that term is used herein, “doesnot substantially increase” means an insignificant increase from anoperational standpoint, for example, an increase of no more than a fewAngstroms (Å), e.g. about 5 Angstroms, more preferably about 1-2Angstroms.

[0032] As used herein, “ammonia” refers to NH₃ in whatever form.Preferably, the ammonia will be in the form of a plasma, or as may beotherwise typically utilized in the art.

[0033] Operating parameters for the process of removing etch residue areset forth below. Preferably, the skilled artisan will find the use of anapparatus known in the industry as a Fusion Gemini Reactor useful forpracticing the method of etch removal according to the variousembodiments described herein. However, other apparatus are within thescope of the invention and will be similarly useful.

[0034] The ammonia should typically be applied at a temperature withinthe range of about 250-500° C. It is even more desirable to utilizetemperatures within the range of about 300-400° C. Especially preferredis a temperature of about 350° C.

[0035] Operating pressure should be within the range of about 0.5-5torr, and is most typically at about 1.5 torr. The applied wattage isusually within the range of about 500-5000 watts, with a range of about1500-2000 watts being even more preferred. In many circumstances, 1900watts will be especially desirable. A typical plasma coil can beutilized for providing the power necessary for the process of theinvention.

[0036] The ammonia is applied to the HAR contact opening(s) at a ratewithin the range of about 100 to 4000 SCCM of NH₃, for a period ofusually less than about 100 seconds. In a preferred embodiment, the timeof ammonia contact with the opening 20 can be about 75 seconds or less.The rate of application, time of operation and amount of NH₃ can varysomewhat according to particular operating conditions. Those skilled inthe art may find that as the temperature goes up, the operating time cango down. Likewise, as the power is increased the time of operation maydecrease as well.

[0037] Referring now to FIG. 6, an exemplary embodiment of the processof the invention is illustrated: Using a fusion reactor 26, pressure ismaintained at approximately 1.5 torr. The temperature of the reactor 26is also set at about 350°. With an operating wattage of about 1900, NH₃flows to the reaction chamber at a rate of about 750 SCCM, theseconditions being sufficient to remove the etch residue 22. After no morethan about 100 seconds, the NH₃ will have cleaned the polymer etchresidue from the opening, while not substantially increasing its size.In addition, no silicon rich oxide is present at the bottom of theopening.

[0038]FIG. 7 shows the same wafer 10 as shown in FIG. 6 after theprocess of the invention has been completed. As can now be seen in FIG.7, the HAR contact opening 20 is clean of any polymer etch residue. Atthe same time, there is no significant increase in the size of thecontact opening and no silicon rich oxide layer is present at the bottomof the contact opening. In this embodiment only NH3 gas is used as theactive gas to remove the polymer residue. A thin nitride layer 28 may beformed over the polysilicon plug 14.

[0039] In another embodiment of the invention, a conventional O₂ plasmadry etch may first be utilized to remove a large portion of the polymerresidue up to a point where some etch residue still remains at thebottom of the opening. This may be done using in situ techniques knownin the art. Also possible is a standard ex situ process using a resiststripper. Following this conventional O₂ plasma etch, the ammonia dryetch, as heretofore described, is then used to complete removal of thepolymer residue, including at the bottom of the opening withoutproducing a silicon rich oxide. In addition, it is also possible toutilize hydrogen gas or methane in lieu of NH₃ during the polymerremoval step.

[0040] The invention uses the ammonia to clean the HAR contact openingof polymer etch residue without silicon oxidation of either the sidewalls or the bottom surface thereof In this way, there is no substantialincrease in the size of the HAR contact. It is therefore desirable, ifpossible, not to utilize any added oxygen, e.g. during a pretreatmentstep, in conjunction with the ammonia etch residue removal process.

[0041] In certain instances, the application of ammonia to the HARcontact surfaces, including the bottom substrate, may leave behind athin layer of nitride deposit, shown as thin layer 28 in FIG. 7. If thebottom substrate is formed of polysilicon, this deposit may take theform of silicon nitride (Si₃N₄). The optional application of a standardwafer cleaning solution such as ammonium chloride or phosphoric acid,can be used to remove all or substantially all of this thin nitridelayer. In any event, application of ammonia, with or without thepreceding O₂ polymer etch removal step, will most typically yield aclean opening bottom surface without a silicon rich oxide layer thereon.

[0042] Referring now to FIG. 8, following application of ammonia toremove the etch residue, and the optional step of wash chemistry toremove any remaining nitride layer, the HAR opening is now ready forapplication of a thin conductive layer of titanium (Ti) 31, which willform a silicide at the bottom of the contact opening 20, and subsequentsteps to form a conductor 30 in contact with the bottom surface of theopening.

[0043] Titanium deposition in the contact opening 20 can be done in amanner known in the art. For example, titanium is deposited on the waferusing a sputter process commonly used with metals. A target containingtitanium is surrounded by an argon plasma. Ions from the plasma hit thetarget surface. The titanium atoms which are removed from the metaltarget then coat the wafer surface. It is also possible to utilize CVDtechniques in which the titanium is formed from the reaction of TiCl₄with hydrogen (H₂). In any even, it is very important that thedeposition material get down into the High Aspect Ratio opening, andreach the bottom surface of the opening or via 20. A collimator may beused to direct the atoms straight down, for better coverage on thecontacts.

[0044] Titanium coats the inside of the contacts to improve the adhesionof a subsequently applied conductor plug 30, typically comprised oftungsten, within the opening 20 of the insulative layer, eg. BPSG.Following titanium deposition, there is a titanium anneal process whichconverts the titanium layer incontact with the polysilicon plug intoTi-silicide and possibly Ti-nitride. Single wafers are placed in anitrogen purged AG chamber, now more commonly known as a STEAG systemfor RTP (rapid thermal process). The chamber or system contains heatlamps which raise the temperature to within the range of about 700-750°C. As the temperature increases, the titanium reacts with polysilicon atthe bottom surface in the contact opening 20 to form Ti-silicide. Thetitanium may also react with the nitrogen in the chamber to produceTi-nitride. Once annealed, the titanium is thus converted into twoconductive material layers, Ti-silicide and Ti-nitride, which bothreduce the contact resistance, with the Ti-nitride layer primarilyacting as a silicon barrier during the tungsten deposition process.These layers will also help protect the silicon substrate from beingdamaged by the subsequent tungsten deposition process.

[0045] The tungsten layer or “plug” provided in the HAR contact openingmay be used, for example, to provide a conductive connection betweenmetal runners and a memory cell in an integrated circuit.

[0046] A processing chamber can be used to deposit the tungsten onto thesurfaces of the wafer, and into the HAR contact opening. This istypically a two-step process which uses tungsten hexafluoride (WF₆) andsilane (SiH₄) to begin the tungsten deposition. The silane provides asilicon source to tie up free fluorine atoms which can damage thesubstrate. After the initial layer of tungsten is produced, thedeposition process is enhanced by replacing the silane with hydrogengas. After tungsten “plug” deposition, the wafers may be rinsed and theintegrated circuit is then ready for further fabrication according tomethods known in the art. FIG. 8 shows the device of FIG. 7 in which aconductive plug 30 has been formed in the contact opening 20.

[0047] Referring now to FIGS. 9-10, there is presented actualmicrophotographs further illustrating the process of the invention, ascompared with conventional O₂ stripping. The top two microphotographs inFIG. 9 A represent high resolution exposed side views of a first contactopening bottom surface in a semiconductor device. The bottom twomicrophotographs FIG. 9A represent high resolution exposed side views ofa second contact opening bottom surface. The top two and bottom twomicrophotographs in FIG. 9B represent high resolution exposed side viewsof a third and fourth contact opening bottom surface, respectively. Thetop two and bottom two microphotographs in FIG. 9C represent highresolution exposed side views of a fifth and sixth contact openingbottom surface, respectively. In FIG. 9A, both the first and secondcontact opening bottom surfaces have been cleaned of polymer etchresidue with ammonia only according to the process of the invention,followed by deposition of titanium, and subsequent deposition of a thinlayer of titanium nitride followed by a layer of tungsten. In FIG. 9B, acomparative example, the third and fourth contact opening bottomsurfaces have been cleaned of etch residue using conventional O₂stripping with bias, followed by high temperature O₂ stripping with nobias. Following O₂ stripping, subsequent deposition of titanium andtungsten layers has occurred as in FIG. 9A. FIG. 9C, a secondcomparative example, the fifth and sixth contact opening bottom surfaceshave been cleaned of etch residue using a high temperature O₂ strip withno bias. Following O₂ stripping, subsequent deposition of titanium andtungsten layers has occurred as in FIG. 9A. In each of FIGS. 9A-C, thetop left and bottom left microphotographs have been speciallyphotographed to illuminate any oxygen present. The top right and bottomright microphotographs of each of FIGS. 9A-C have been speciallyphotographed to show the presence of titanium and tungsten. In FIG. 9A,which represents the process of the invention, both the top left and thebottom left microphotographs are dark, indicating that little or nooxygen is present in the first and second bottom opening contactsurfaces. However, in both of FIGS. 9B and C, each of the top and bottomleft photographs have a grainy white appearance at the bottom surface ofeach of the third through sixth contact openings, indicating thepresence of a substantial amount of oxygen left over from stripping. InFIG. 9A, the top and bottom right microphotographs are bold with cleanlines, indicating the successful deposition of titanium in the first andsecond contact opening bottom surfaces. The thin band which can beobserved across the top of the titanium silicide layer is the titaniumnitride layer. In each of FIGS. 9B and 9C, however, the depositedtitanium and titanium nitride layers are much less pronounced withconsiderably more blurring. This indicates a less successful depositionon each of the third through sixth bottom surfaces, which is likely tohave a negative impact on conductivity.

[0048]FIGS. 10A, 10B and 10C are high resolution microphotographsshowing three additional contact opening bottom surfaces in side viewclose-ups. In FIG. 10A, the contact opening bottom surface has beencleaned of polymer etch residue with ammonia only according to theprocess of the invention, followed by deposition of titanium, andsubsequent deposition of a thin layer of tungsten. In FIG. 10B, acomparative example, the contact opening bottom surface has been cleanedof etch residue using conventional O₂ stripping with bias, followed byhigh temperature O₂ stripping with no bias. Following O₂ stripping,subsequent deposition of titanium and tungsten has occurred as in FIG.10A. In FIG. 10C, a second comparative example, the contact openingbottom surface has been cleaned of etch residue using a high temperatureO₂ strip with no bias. Following O₂ stripping, subsequent deposition oftitanium, titanium nitride and tungsten has occurred as in FIG. 10A. Asseen similarly with FIG. 9A, FIG. 10A shows a cleanly formed depositionlayer of titanium, together with a well-defined thin band of tungstenacross the top thereof. In contrast, both of FIGS. 10B and C presentrather blurry, much less defined layers of titanium and tungsten, whichis indicative of less successful depositions.

[0049] Although the invention has been described in connection withetching an opening or via for formation of a conductive plug, theinvention can also be used to etch and subsequently etch-residue cleanany opening, including, for example, openings used for form containercapacitors in a memory circuit. Thus, the above description is onlyillustrative of exemplary embodiments which achieve the features andadvantages of the present invention. It is not intended that the presentinvention be limited to these exemplary embodiments. Any modification ofthe present invention which comes within the spirit and scope of thefollowing claims should be considered part of the present invention.

[0050] What is claimed as new and desired to be protected by LettersPatent of the United States is:

What is claimed is:
 1. A method for removing polymer etch residue froman etched opening in a silicon wafer device comprising contacting saidopening with ammonia gas to remove said polymer etch residue.
 2. Themethod of claim 1, wherein said opening is a High Aspect Ratio (HAR)contact opening.
 3. The method of claim 2, wherein said contacting isperformed under conditions effective to remove said etch residue withoutsubstantially increasing the size of said opening.
 4. The method ofclaim 3, wherein said opening is contacted with ammonia gas in theabsence of oxygen.
 5. The method of claim 2, wherein said ammonia gas isin a plasma.
 6. The method of claim 5, wherein said contacting is doneat a temperature within the range of about 250-500° C.
 7. The method ofclaim 6, wherein said contacting is performed in a plasma reactor withina power reactor range of about 500-2500 watts.
 8. The method of claim 7,wherein said contacting is performed within a power range of about1500-2000 watts.
 9. The method of claim 7, wherein said contacting isperformed with an ammonia gas flow rate within the range of about 500 to1000 SCCM.
 10. The method of claim 9, wherein said contacting isperformed at power of about 1900 watts and a temperature of about 350°C.
 11. The method of claim 10, wherein said contacting is performed withan ammonia gas flow rate of about 750 SCCM.
 12. The method of claim 9,wherein said contacting is performed for a period of less than about 100seconds.
 13. The method of claim 12, wherein said contacting isperformed for a period of not more than about 75 seconds.
 14. The methodof claim 1, further comprising forming a conductive layer at the bottomof said opening following said contacting step.
 15. The method of claim5, wherein said contacting step produces silicon nitride at the bottomof said opening, said method further comprising removing said siliconnitride.
 16. A method for removing polymer etch residue from an etchedopening in a silicon wafer device, comprising the steps of: contactingsaid opening with an oxygen containing plasma, stopping said oxygenplasma contacting before said polymer etch residue is completely removedand thereafter contacting said opening with ammonia gas.
 17. The methodof claim 16, wherein said contact opening is an High Aspect Ratio (HAR)opening, and said ammonia contacting step is performed under conditionseffective to remove said etch residue without substantially increasingthe size of said opening.
 18. The method of claim 17, wherein saidammonia contacting occurs in the absence of oxygen.
 19. The method ofclaim 18, wherein said ammonia gas is in a plasma.
 20. The method ofclaim 19, wherein said ammonia contacting is performed at a temperaturewithin the range of about 250-500° C.
 21. The method of claim 19,wherein said ammonia contacting is performed in a reactor operating in apower range of about 500-5000 watts.
 22. The method of claim 20, whereinsaid ammonia contacting is performed at a temperature of about 350° C.23. The method of claim 21, wherein said reactor power is about 1900watts.
 24. The method of claim 21, wherein said ammonia contacting isperformed at a flow rate within the range of about 100 to 4000 SCCM. 25.The method of claim 15, wherein said ammonia contacting is performed fora period of time sufficient to remove said residue from a bottom of saidopening.
 26. The method of claim 25, wherein said bottom of said openingis not oxidized during said ammonia contacting step.
 31. The method ofclaim 30, wherein said contacting is performed under conditions which donot oxidize said opening.
 32. The method of claim 31, wherein saidopening is contacted in the absence of added oxygen.
 33. The method ofclaim 30, wherein said ammonia gas is in a plasma.
 34. The method ofclaim 33, wherein said contacting is done in a plasma reactor at atemperature within the range of about 250-500° C., with a reactor powerwithin the range of about 500-2500 watts, with an ammonia gas flow rateof about 500 to 1000 SCCM, and for a period of no more than 100 seconds.35. The method of claim 34, wherein said contacting is performed withina reactor power range of about 1500-2000 watts.
 36. The method of claim34, wherein said contacting is performed with a reactor power at about1900 watts and a temperature of about 350° C.
 37. The method of claim34, wherein said contacting is performed with an ammonia gas at a flowrate of about 750 SCCM.
 38. The method of claim 35, wherein saidcontacting is performed for a period of not more than about 75 seconds.39. The method of claim 29, further comprising forming a silicide layerat the bottom of said contact opening following said contactingoperation.
 40. The method of claim 29, further comprising contactingsaid opening with an oxygen plasma between said etching and cleaningsteps to remove a portion of said etch residue.
 41. The method of claim29, wherein an insulating layer is formed on said device prior to saidetching and said etching forms a contact hole in said insulating layer.42. The method of claim 41, wherein said etching is dry etching.
 43. Themethod of claim 42, wherein said dry etching is performed using at leastone fluorine-containing gas.
 44. The method of claim 43, wherein saidfluorine-containing gas is at least one gas selected from the groupconsisting of CH₂F₂, CHF₃, C₂F₆, C₂HF₅, and CH₃F.
 45. A semiconductordevice comprising: an insulating layer; and an ammonia-cleaned etchedopening in said insulating layer; and, a conductor formed in saidcleaned opening.
 46. An integrated circuit comprising anammonia-cleaned, etch residue-free High Aspect Ratio opening provided inan insulating layer, said opening being formed atop a polysiliconregion, said opening containing a conductor which electrically connectswith said polysilicon region.
 47. An integrated circuit as in claim 46further comprising: a silicide layer between said conductor and saidpolysilicon region.
 48. An integrated circuit as in claim 46, whereinsaid integrated circuit is a memory circuit.
 49. An integrated circuitas in claim 47 wherein the interface area between said conductor andpolysilicon region is free of oxygen contamination.
 50. A method offorming an integrated circuit structure comprising: forming aninsulating layer over a polysilicon region; forming a high aspect ratiocontact opening in said insulating layer down to said polysilicon regionusing a fluorine containing gas; removing polymer residue from saidcontact opening using a gas which provides an oxide free bottom of saidcontact opening; forming a silicide layer at the bottom of said openingin contact with said polysilicon layer; forming a conductor in saidopening in electrical contact with said silicide layer.
 51. A method asin claim 50 wherein said gas for removing said polymer residue isammonia gas.
 52. A method as in claim 50 further comprising removing apotion of said polymer residue from said contact opening with oxygenprior to using said gas which provides an oxide free bottom of saidcontact opening.
 53. A method as in claim 50 wherein said suicide layeris a titanium silicide layer.